The reason is not seen in the schematics from TFA, because these are some early DTL gates, which are even slower, but for other motives, i.e. because they use a pull-up resistor at output.
To improve their speed, one must use a totem-pole output, where at the output the pull-up resistor is replaced by a transistor, so that the output can charge quickly a capacitive load, ensuring fast transitions from low to high.
Then only 1 of the 2 output transistors is on, depending on the logic state.
So those 2 transistors must have inputs of opposite polarities. This is done by connecting the pull-up transistor to the collector of the driver transistor and the pull-down transistor to the emitter of the driver transistor.
In the gate with totem-pole output, there must be a level-shifting diode connected to the base of the driver transistor, to ensure that the threshold between "0" and "1" is the same at input and at output, i.e. the threshold is equal with 2 silicon diode voltage drops (the 2 diodes are the emitter junction of the driver transistor in series with the emitter junction of the pull-down output transistor), i.e. approximately 1.4 volt (which is the midpoint between the levels that are defined as the limits for "0" and "1", i.e. 0.8 volt and 2.0 volt, leaving a margin for noise that will not cause a wrong logic value).
When an input to the totem-pole DTL goes from high to low, the level-shifting diode becomes reverse biased, so current cannot pass through it, so the driver transistor remains with an open base. Bipolar transistors that are blocked by leaving their base open, become off only very slowly, because there is no path to evacuate the charge carriers from their base region, and until all mobile charge carriers from the base decay by recombination, the transistor remains on, which may take many microseconds.
In TTL, the difference from totem-pole DTL is that the input diodes and the level-shifting diode are no longer separated by an isolation diffusion and they are close enough so that the bipolar transistor effect appears between them.
Thus the input diodes become multiple emitter junctions of a bipolar transistor, while the level-shifting diode becomes the collector junction of that transistor.
The bipolar transistor effect consists in the fact that if there exists an emitter current, it passes through the collector junction, despite the fact that it is reverse biased, which in an isolated diode would prevent the passing of any current.
Thus the transistor effect ensures that when the input goes from high to low, there is a current through the level-shifting diode, which removes the mobile charge carriers from the base of the driver transistor, ensuring that it becomes off immediately, so the TTL gate switches faster than the DTL gate when the input goes from high to low (and the output goes from low to high, because the simplest TTL and DTL gates are inverting gates).
After TTL gates with a power supply of 5 volt replaced the DTL gates in computers, there was a DTL variant that survived until the mid seventies. That DTL variant used a higher supply voltage, typically of 15 volt, to ensure a high noise immunity in industrial applications, where the lower speed also did not matter much. That variant of DTL was eventually replaced by the CMOS 4000 series of logic circuits, initially introduced by RCA, which used the same power supply, but which had a much lower power consumption.
But seriously, is it possible to analyze the modern chips like Apple M1 using the same methods? To find out, for instance, why there are so much more efficient than Intel CPUs?
Author here for your DTL questions...
Why is DTL slower than TTL?
The reason is not seen in the schematics from TFA, because these are some early DTL gates, which are even slower, but for other motives, i.e. because they use a pull-up resistor at output.
To improve their speed, one must use a totem-pole output, where at the output the pull-up resistor is replaced by a transistor, so that the output can charge quickly a capacitive load, ensuring fast transitions from low to high.
Then only 1 of the 2 output transistors is on, depending on the logic state.
So those 2 transistors must have inputs of opposite polarities. This is done by connecting the pull-up transistor to the collector of the driver transistor and the pull-down transistor to the emitter of the driver transistor.
In the gate with totem-pole output, there must be a level-shifting diode connected to the base of the driver transistor, to ensure that the threshold between "0" and "1" is the same at input and at output, i.e. the threshold is equal with 2 silicon diode voltage drops (the 2 diodes are the emitter junction of the driver transistor in series with the emitter junction of the pull-down output transistor), i.e. approximately 1.4 volt (which is the midpoint between the levels that are defined as the limits for "0" and "1", i.e. 0.8 volt and 2.0 volt, leaving a margin for noise that will not cause a wrong logic value).
When an input to the totem-pole DTL goes from high to low, the level-shifting diode becomes reverse biased, so current cannot pass through it, so the driver transistor remains with an open base. Bipolar transistors that are blocked by leaving their base open, become off only very slowly, because there is no path to evacuate the charge carriers from their base region, and until all mobile charge carriers from the base decay by recombination, the transistor remains on, which may take many microseconds.
In TTL, the difference from totem-pole DTL is that the input diodes and the level-shifting diode are no longer separated by an isolation diffusion and they are close enough so that the bipolar transistor effect appears between them.
Thus the input diodes become multiple emitter junctions of a bipolar transistor, while the level-shifting diode becomes the collector junction of that transistor.
The bipolar transistor effect consists in the fact that if there exists an emitter current, it passes through the collector junction, despite the fact that it is reverse biased, which in an isolated diode would prevent the passing of any current.
Thus the transistor effect ensures that when the input goes from high to low, there is a current through the level-shifting diode, which removes the mobile charge carriers from the base of the driver transistor, ensuring that it becomes off immediately, so the TTL gate switches faster than the DTL gate when the input goes from high to low (and the output goes from low to high, because the simplest TTL and DTL gates are inverting gates).
After TTL gates with a power supply of 5 volt replaced the DTL gates in computers, there was a DTL variant that survived until the mid seventies. That DTL variant used a higher supply voltage, typically of 15 volt, to ensure a high noise immunity in industrial applications, where the lower speed also did not matter much. That variant of DTL was eventually replaced by the CMOS 4000 series of logic circuits, initially introduced by RCA, which used the same power supply, but which had a much lower power consumption.
Write a book please!
But seriously, is it possible to analyze the modern chips like Apple M1 using the same methods? To find out, for instance, why there are so much more efficient than Intel CPUs?